The AI boom continues, and from the signals we’ve seen, strong demand looks primed to continue for years. Alongside the rapid construction of AI datacenters to meet that demand is a substantial buildout of semiconductor production capacity. Of all the U.S.-based chip makers, Intel is the one most critically involved in that buildout. For Intel and the broader chip industry, this includes new capacity for both wafer production and advanced packaging.

We’ve published a number of pieces lately about the economic and geopolitical importance of U.S. sovereign chip manufacturing on leading-edge nodes. (See the full set of links at the end of this article.) The embodiment of this is Intel’s newly opened Fab 52 in Chandler, Arizona — home of the Intel 18A node, which the company now uses to produce its cutting-edge processors. Fab 52 is one element of a broad capital-investment plan initiated five years ago by former CEO Pat Gelsinger. That plan has been substantially modified, first by Gelsinger and, since March 2025, by current CEO Lip-Bu Tan, to deal with Intel’s ups and downs in the marketplace. Yet it has already delivered other important milestones, including the 2024 launch of Fab 9 in New Mexico for advanced packaging. The beat goes on as the company continues work on the Intel 18A-P and Intel 14A nodes and the construction of new facilities such as Fab 62 in Arizona.

Intel must continue this work to meet demand in the age of AI, to progress in its own turnaround as a chip leader, and to promote the fortunes of Intel Foundry — whether that unit remains part of Intel or someday spins out on its own. But what exactly goes into building a leading-edge node and the fab to house it? What kinds of investments are required, and how long does it take? Beyond that, what has changed about the economics and timetables of chip production in the age of AI?

(Note: Intel has been an advisory client of MI&S for many years, but I’m not privy to all of its internal planning, plus there are NDA details that can’t be shared here. Everything in this piece has been verified against public sources or comes from on-the-record conversations with experts at Intel.)

Investing to Support Leading-Edge Chip Manufacturing

Gelsinger became CEO after a period when Intel’s famously consistent operational execution had lagged. He launched the ambitious “IDM 2.0” strategy in 2021 to pivot Intel into a world-class foundry operator while improving global supply-chain and production capacity and quality. The strategy allotted upwards of $100 billion over several years for fab construction or expansion projects at four sites in the United States and several countries in Europe and Asia.

One key element of the strategy was the “five nodes in four years” (5N4Y) initiative to help Intel regain its place at the leading edge of chip manufacturing. The creation of those nodes brought with it the use of extreme ultraviolet (EUV) lithography and the implementation of Intel’s proprietary PowerVia backside power delivery and RibbonFET gate-all-around (GAA) technologies. Intel 18A, which has been producing chips at Fab 52 since late 2025, represents the culmination of the 5N4Y plan and a critical real-world payoff of the IDM 2.0 strategy as Intel uses it for high-volume-manufacturing (HVM) of Panther Lake and Xeon 6+ Clearwater Forest chips. For much more detail on 18A and its contributing technologies, read this piece from Matt Kimball; for more on the importance of Panther Lake, read this one from Anshel Sag.

It’s worth pausing here for some perspective on the economics of leading-edge chip nodes: According to its SEC filings, Intel’s capex from 2021 through 2025 totaled well over $100 billion — even after the company cancelled some construction projects and slowed others to account for the tough realities of a strategic overhaul. And while fiscal discipline is a touchstone for Tan, the company has continued to invest heavily in leading-edge production. It had roughly $5 billion in gross capital expenditures just in the first quarter of 2026, with spending on fab tools rising as the outlay for facility construction abates. On the Q2 2026 earnings call last week, Tan said that the company has revised its capex projection for the whole year to more than $20 billion — well above its original expectations. And he added that 2027 capex should be “significantly above” that number.

Market Demand for Semiconductors in the AI Era

As significant as Intel’s capex has been, it pales in comparison to the spree the hyperscalers have been on over the past few years to build out AI capacity. After forking out roughly three-quarters of a trillion dollars in capex collectively from 2023 to 2025, Amazon, Google, Meta, and Microsoft are on course to spend more than $700 billion on capex in 2026 alone. Anyone who follows our work will be familiar with the corresponding levels of effort and investment going into AI models, hardware, and enterprise software.

On the chip side, much of the focus in the early going of the AI era was on datacenter GPUs, with NVIDIA serving as a bellwether for not only chip makers but the entire AI sector. Yet in his recent pieces, my colleague Matt Kimball has eloquently explained the growing heterogeneity in AI compute. Datacenter GPUs are being joined by specialized chips designed in-house by the hyperscalers (TPUs, Trainium, etc.), as well as chips from merchant suppliers like Broadcom and Marvell. On the client side, new waves of SoCs are shifting some AI tasks away from GPUs to NPUs, CPUs, and other accelerators.

These trends have helped spur demand for Intel’s products even though it has never established a dominant position in GPUs. In a recent conversation with a product leader at Intel, he told me that he noticed customers starting to ask specifically for non-GPU AI chips in significant numbers about a year ago. Besides the silicon types already mentioned, this extends to other design arrangements such as memory-on-chip. And all of it reflects a desire — by hardware vendors and by enterprises building out AI stacks — to optimize for the metrics and specific use cases that make a difference to them.

In the context of Intel’s production buildout, this has meant steady and growing demand from Intel’s in-house product teams and from customers requesting advanced silicon or advanced packaging. The demand has been strongly oriented toward AI infrastructure, and the rapidity of AI growth has meant, in some cases, a customer putting in a large order one month, then coming back to double that order just a month later. The Intel exec I talked with also emphasized that customer demand has brought various performance thresholds forward by as much as three years compared to what he expected — to the point that he stated flatly that Moore’s Law is speeding up. All of this reflects significant change in the demand profile for leading-edge chip production.

What Is Involved in Creating a Leading-Edge Node?

So what specifically goes into creating a leading-edge node to meet the demands of AI and everything else expected of chip makers today? As touched on above, Intel 18A brought to production GAA and backside power delivery. These wafer technologies, along with ongoing advances in materials, are important not only because they increase performance, but also because they relieve previous geometric constraints to allow denser chip designs. All of this is further augmented by Intel’s proprietary Foveros 3-D advanced packaging technology in use at Fab 9 in New Mexico. But all these high-end capabilities also bring with them greater overlapping complexities across platform technology, infrastructure development, EDA, materials, and the rest of the chip production ecosystem. As the sole U.S.-headquartered leading-edge chip manufacturer, this is what Intel must contend with.

At an industry conference in June 2026, Intel said that Intel 18A-P is in risk production — a low-volume manufacturing period that allows engineers to vet a node on ordinary production lines, in this case in Intel plants in Oregon and Arizona. While maintaining backward compatibility with Intel 18A, the 18A-P node brings a list of enhancements including 9% higher performance at the same power level or 18% lower power draw at the same performance; Power Boost, a dual-contact, low-resistance transistor option; improved thermal resistance and via resistance; and new options for low-power and high-performance transistors. This boils down to more design flexibility and chips that are better in terms of efficiency, performance, and thermal characteristics. At Computex 2026, Intel said that its upcoming Xeon 7 (Diamond Rapids) server processors, scheduled to enter the market in 2027, will be manufactured on Intel 18A-P.

After that, the vital node on the horizon is Intel 14A. Whereas 18A-P is an important enhancement of 18A, Intel 14A represents a much bigger step in the advancement of leading-edge chip manufacturing. To take one example, Intel Foundry recently began using the futuristic High-NA EUV lithography tools from ASML to make selected layers of some Panther Lake processors on the 18A node. According to ASML, this makes Intel the first manufacturer in the industry to ship a high-volume logic product made using High-NA tools, and the companies can use the data from this implementation “to further refine system setup, uptime, and manufacturing implementation.” Looking ahead to 14A, Intel says it will have the option to use High-NA EUV more broadly, which — among other benefits — could allow significant simplification of manufacturing steps and correspondingly faster cycle times for production.

With early tooling milestones already achieved and a crucial process design kit for customers expected later this year, Tan said on the Q2 2026 earnings call last week that Intel is on track for 14A risk production for internal products in the second half of 2027, adding that the company is now committed to a high-volume ramp of 14A for external customers in 2028 — ahead of the previously communicated schedule. This should allow the company to square off against TSMC’s A14 node; although there are some technical differences in the two companies’ methods that are beyond our scope here, suffice it to say that Intel’s approach should be well-suited for datacenter use cases. More to the point, if the company has its way, Intel 14A will help it win big foundry contracts from hyperscalers and fabless chip companies.

There’s more planned after that. A couple of months ago, Tan confirmed that Intel has already put 10-angstrom and 7-angstrom fabrication technologies on its roadmap, which would presumably take it well into the 2030s. Tan, who has decades of top-level experience in the chip business, clearly understands the dynamics in play for a trusted foundry. Its best customers will be those that want to stick around for many years, and those companies naturally want to see how the production technology is shaping up way in advance.

Challenges and Timelines for Building a Leading-Edge Fab

When talking up IDM 2.0, Gelsinger was fond of pointing out that these are some of the largest factories in the world that are making the tiniest, most precise devices anywhere — and, I would add, using some of the most elaborately engineered machines ever created by human beings. The takeaway is that every single thing in these fabs must operate at incredibly fine tolerances, and the breakthroughs that people ooh and aah about once they’re launched (RibbonFET, PowerVia, exotic new materials, etc.) routinely take years of gestation time and refinement before they are ready for a production line.

This level of engineering gives context to the graphic above showing typical timeframes for fab construction, which only gets more complicated with each new generation of production equipment. This is compounded today by the rapid buildout of AI datacenters, because the same construction firms — and their specialized crews — that build those datacenters are also the ones who build chip fabs. This competition for contractors makes physical labor a chokepoint. (Another AI-driven chokepoint: the availability of memory chips.) There is a bit of good news, though: A company executive confirmed to me that Intel planned all of its current facilities to run on grid power, so it has been able to sidestep some of the energy challenges that are facing megawatt and gigawatt AI datacenters.

Chip makers are also challenged when it comes to equipment purchases. Lead times for specialized tools continue to rise, and there are very few suppliers of some critical types of equipment — in some cases, just one supplier. So a fab operator that orders a piece of advanced EUV equipment today, for example, can expect to see it in 18 to 24 months. And only then can the painstaking process of installation and qualification begin — with its own requirements for specialized engineering staff. Crucially, given the limits to standardization for anything in a fab, you can’t just do “copy-&-paste” for any of this. Without being privy to the specifics of Intel 14A, Fab 62, or other efforts underway, we can surmise that this is the phase that Intel is in for many of its development initiatives, and where a lot of its current capital investment is going: tool installation, qualification, and optimization.

Unfortunately, a leading-edge fab is such a rare bird that even many otherwise savvy tech operators have unrealistic expectations about what is attainable by when. I’ve heard of tech financiers who tend to think that everything happens on “software time” — which couldn’t be more different from what Intel and its equipment providers are facing when they’re integrating production machines operating at the cutting edge of materials science and physics.

How Soon Could Intel’s Investments in Leading-Edge Fabs Pay Off?

This is the trickiest question. While veteran fab engineers can explain the timetable for qualifying a deposition tool or piece of metrology equipment, and while Lip-Bu Tan is certainly correct that a foundry must show the development of its leading-edge roadmap several generations out, those expert views can’t tell us when Intel will be back to strong growth in revenue and earnings.

What we do see is better execution of the fundamentals, as suggested, for example, in the regular progression of Intel 18A-P and the promising early yield rates reported for Intel 14A. Besides the new technologies I’ve already mentioned, the company is continuing its long-range R&D in areas including transistor design, power management, and the use of new materials (e.g. subtractive ruthenium interconnects). All of this should help it stay at the leading edge of the curve as feature sizes on semiconductors continue to shrink.

On the business side, Intel got a boost in April 2026 when Elon Musk said that Tesla will use Intel 14A for chips made in its planned Terafab AI complex in Texas. Since then, Tan has said that Intel has “multiple customers engaged” for foundry deals, and just last week Intel and Fortinet announced that they would build on their longstanding relationship by collaborating on the Fortinet Security Processor 6 — which will be built on the Intel 4 node. There are also credible reports that Google has engaged Intel to make 3 million TPU chips through 2028, and it seems clear that there is interest from Apple as well. Other rumors keep surfacing names like NVIDIA, Broadcom, and even AMD. But I’m really looking forward to more of the reports and rumors turning into firm customer commitments for high-volume manufacturing — ideally this year.

It was clear from day one of the IDM 2.0 plan, and from the day Lip-Bu Tan became CEO, that Intel’s leadership knows that becoming a viable commercial foundry for leading-edge chip production is a marathon, or maybe a series of marathons. As optimistic as I am about what I’ve seen from Intel lately, the real payoff for its foundry strategy will come as the company keeps crossing the finish lines of volume deals signed, revenue realized, and profits recorded.

Related Moor Insights & Strategy Research

• Research Brief: Onshoring Leading-Edge Chip Production Is Not Enough — Matt Kimball & Patrick Moorhead — June 18, 2026
• Research Paper: The Economic Impact of a Domestic Semiconductor Foundry — Anshel Sag & Patrick Moorhead — April 6, 2026
• Analyst Insight: Transistor Leadership and Manufacturing Excellence in the Sub-2nm World — Matt Kimball — February 3, 2026
• Analyst Insight: The Future Geography of Semiconductors: AI Demand, Manufacturing Reality, and the Strategic Center of Gravity — Matt Kimball — January 5, 2026
• Analyst Insight: Why Intel’s Onshore Chip Production Is So Important for U.S. Industrial Policy — Patrick Moorhead — December 1, 2025
• Analyst Insight: Why Intel Foundry Matters More Than You Think — Anshel Sag — October 31, 2025
• Research Note: Intel’s Panther Lake — A Crucial Moment in Intel’s Product and Foundry Turnaround — Anshel Sag — October 14, 2025