Intel’s 14nm Process Is Alive And Well, Thank You

Intel lifted the veil today on its 14nm process and shared many, many details on it. Had you read a few of the articles on it over the last month, you would have thought that its 14nm process had driven off the road and was stuck in a ditch. After spending the day in Portland, Oregon, last week talking with Intel’s engineering and manufacturing executives and technical fellows, I can tell you Intel’s 14nm is alive and doing well at least on the PC side.

Before I created my tech analyst firm, I worked as an exec at AMD for over a decade and worked for nearly a decade as a PC and server OEM running products where I specified and negotiated chip pricing. All in all, I’ve been in the vicinity of chips for nearly 25 years. I know chips and I know what to look for and what questions to ask.

The way you know chip companies are lying isn’t when their lips are moving, it’s when they withhold information. It’s also when they lambast their competitors. Intel disclosed an immense amount of information on its 14nm process, sometimes in relative scales, and but for a short respite, didn’t even acknowledge the competition.

With that said, let me tell you what I found out about 14nm.

How small did the transistors get?

Let’s first look at scaling. When you “shrink” a process, like going from 22nm to 14nm, you want things to get smaller, of course, so you can increase your “die-per-wafer” (DPW). Increasing DPW, all things equal, means lower cost per die, which turns into a less expensive chip after packaging. If you did simple math and divided 22 by 14 you would get .63x, but rarely is it linear.

(Images supplied by Intel)(Image supplied by Intel)

Here’s how Intel looks on 14nm:

  • Transistor fin pitch:     .70x scale (14nm is 70% size of 22nm)
  • Transistor gate pitch:  .78x scale (14nm is 78% size of 22nm)
  • Interconnect pitch:      .65x scale (14nm is 65% size of 22nm)
  • Cache cell size:              .54x scale (14nm is 54% size of 22nm)

(Pitch is the distance between items.)

All in all pretty impressive, particularly Intel’s cache cell size and interconnect pitch. What have we learned here? 14nm is smaller than 22nm as one would expect. But what about performance and leakage?

Transistor performance and leakage

Performance and leakage are two variables that play against each other in transistors. All things equal, the higher performance you want, the more “leaky” the transistors. By “leaky,” I mean that it’s less power efficient. Conversely, the lower the power, lower the “leakage” and lower the performance. While I would like to see very specific numbers, based on what Intel shared, 14nm has a much wider dynamic range, or the ability to scale between phones and server chips, than even 22nm. And that’s a good thing.

(Image supplied by Intel)(Image supplied by Intel)

Transistors are one thing, but what about a real product? You may gave great transistors, but screw up the metal layers.

But how small did the logic get?

One metric Intel uses to measure the correlation between its transistor gate shrinks and metal layer shrinks is “logic area scaling”. Logic area scaling is essentially the combined amount the transistor gates and metal layers shrunk.

(Image supplied by Intel)(Image supplied by Intel)

Intel reported that since 45nm to 14nm, each successive generation scaled to .53X of its predecessor, or roughly 53% of its size, at least in logic. While I have no idea how they can do that each generation as it sounds to me too precise to be that consistent over a decade, it does show Intel is on track here.

OK, everything is smaller, but what about cost?

Those wafers must cost a bundle, right?

You would think that the bleeding edge, 14nm wafers would cost a lot. Well they do. Based on Intel’s projections, they cost a lot more than 22nm wafers which cost a lot more than 32nm. But you need to factor in how many transistors you can put on that wafer, which in Intel’s case, is more than previous processes and outweighs the cost increase. So net-net, Intel appears to be delivering a lower cost per transistor.

(Image supplied by Intel)(Image supplied by Intel)

I must note though, a few things on “cost”. First, none of this included the R&D to develop 14nm. That was billions and is included below the gross margin line in R&D. Secondly, all cost projections have baked into them specific fab capacities, which, Intel never shares. If Intel doesn’t hit their fab capacity estimates, cost per transistor will go up.

Additionally, keep in mind that there is a flip side to Moore’s Law, and that the next fab is twice as expensive as the previous one.

But what about yields?

Designs may have really good logic scaling and cheap transistors and wafers, but if you can’t “yield” it, measured by “good die per wafer” (GDPW), it’s all for naught. “Die” are what become the chip after its fabbed, tested and placed in a package. For example, if you have 500 good die per 1,000 dies on a wafer, that’s a 50% yield.

What we know from Intel now is that, compared to 22nm at the same point in its life-cycles, 14nm is yielding less. While Intel wouldn’t give specific figures, by information they did provide, I estimate they are around 5-10% behind where 22nm was at the same point in its lifecycle. Intel is forecasting identical yields to 22nm in TBD months.

(Image supplied by Intel)(Image supplied by Intel)

There are two ways to look at this. Glass half full says that 22nm was the best yielding process in recent history so anything close to it is good. Glass half empty says that they are behind and product should have been here in volume by now. Only Intel knows for sure. What we do know is that 14nm Broadwell is “healthy,” and the process and Broadwell is in volume production.

Wrapping up

Running your own fab and developing transistors isn’t easy. I’ve been on both sides, the chip guy, guy with a fab, and the OEM guy. What people need to understand better is that being the first to do something is never easy in the chip world, no matter how much money you have. Mistakes get made and sometimes it is harder than other processes and products to figure out things. Remember, people are inventing things, doing things that have never been done before. There is no recipe book or training manual.

For Intel, 14nm has in fact been harder than 22nm, and it took longer getting products out the door than Intel would have wanted. Intel is off of their “Tick-Tock” cadence, based on Ivy Bridge parts coming out April of 2012. Intel needs 14nm and Broadwell to bring more excitement and sexiness to their notebooks, tablets, and 2in1s, not to mention 14nm for mobility.

Based on what I’ve seen, Intel is well on their way with 14nm on the PC side of the house with Broadwell and are literally in the home stretch. I’ll talk more about Broadwell in a future column.