The U.S. Semiconductor Buildout Is Broad, and the Investments Are Enormous

Something unusual is happening in American manufacturing. Over the past few years most major semiconductor manufacturers have committed to expanding in the United States, and the dollar sums involved have grown large enough that they’ve stopped meaning much to most readers. Announced commitments across the industry now run well into the hundreds of billions of dollars.

GlobalFoundries is putting $16 billion into New York and Vermont, including an advanced packaging and photonics center. Intel has announced more than $100 billion across four states. Micron has pledged more than $250 billion through 2035 across Idaho, New York, and Virginia. Samsung is building in Taylor, Texas. Texas Instruments is spending more than $60 billion across seven fabs at three sites in Texas and Utah. TSMC raised its Arizona commitment to $265 billion in July 2026. Beneath them sits a tier of specialists doing work that rarely makes headlines, including Analog Devices, onsemi, SkyWater, and Wolfspeed.

The useful comparison isn’t the size of the commitments. It’s how much of the semiconductor lifecycle each commitment places on U.S. soil, and how much is running today.

The temptation is to read that as a scoreboard and ask who’s winning. It’s the wrong question, and the numbers wouldn’t support an answer anyway. The projects cover different time horizons, different starting points, and different accounting conventions. Some are five-year plans. Some run to the middle of the next decade. Comparing them directly tells you very little.

What matters more is that they buy different things. Memory, analog, specialty nodes, and leading-edge logic are separate businesses solving separate problems, and every one of them is required for AI to work at scale. An accelerator without high-bandwidth memory is an expensive paperweight. A rack doesn’t power on without analog and power management silicon. None of these investments substitutes for another, which is why the breadth of this buildout is more encouraging than any single line item in it.

Read the table with that lens and it says something different than the dollar figures do.

AI Demand Is Accelerating a Broader U.S. Manufacturing Shift

Capital follows customers, and many of the largest model developers, hyperscalers, and leading-edge chip buyers are headquartered in the United States. That pull is real, and it explains a good deal of what TSMC, Micron, and Intel are building here.

TSMC’s decision shows how strong it has become. In July 2026 the company raised its Arizona commitment by $100 billion and tied the increase to demand from U.S. customers. It didn’t have to make that choice. Taiwan remains the center of its manufacturing base, and building in Arizona costs more than building at home. Doing it anyway says something about how durable TSMC expects U.S. demand to be.

Pull that strong can lead to a simple conclusion — that AI demand is driving all of this — but that conclusion would be wrong. Texas Instruments, GlobalFoundries, and the specialty manufacturers serve automotive, industrial, defense, communications, and power markets with their own demand curves and their own reasons to want domestic supply. What AI has done is accelerate a shift that was already underway.

Policy accelerated it too. CHIPS Act funding, the Agreement on Reciprocal Trade signed with Taiwan in 2026, and federal equity participation in Intel have all shaped timing and scale. But none of that created the commercial logic, which includes customer proximity, geographic diversification, and supply chain resilience. It simply moved the schedule.

Put these factors together and a national dimension comes into view, though it’s narrower than the way it usually gets discussed. The question isn’t which country leads in AI. It’s whether the infrastructure that AI runs on can be built and sustained domestically. Competition between the United States and China gives that question urgency, but the manufacturing ecosystem itself remains multinational.

A Fab Is One Part of Semiconductor Capability, Not the Whole of It

Here’s where the headline numbers start to mislead. A fab is the most visible part of the semiconductor business. It’s what many people think of when they think of semiconductors, and it looks great in photographs and videos. But it’s one link in a chain that’s considerably longer. Five links in that chain matter for AI, and they aren’t equally easy to relocate.

Materials and device research comes first, and it’s the least visible. This is the work of figuring out what physical structures, materials, and integration techniques make a future process possible at all. Gate-all-around required new device structures, along with demanding deposition, patterning, and process control. Backside power delivery required extreme wafer thinning and backside processing that didn’t exist in production a decade ago. Interconnect innovation, thermal management, and packaging materials sit in the same category. For AI, these needs are immediate rather than academic, because power and thermal limits have become a binding constraint on datacenter buildout.

Process technology is the next stage, and a distinct one. It’s the work of turning those inventions into a repeatable, yieldable manufacturing recipe. Where that development happens determines who sets the pace, and a fab can perfectly well run a node that was developed somewhere else. Generational improvements in accelerator performance are gated on node advancement, so the location of that work has consequences beyond the company doing it.

Wafer manufacturing is the stage everyone usually means when they say manufacturing, and it deserves a distinction that usually gets skipped. A country can host enormous fab capacity and still be a generation or two behind on the production node. Millions of wafers a year on a mature process is real industrial capability, but it is not the same thing as making the most advanced chips in the world. Running a leading-edge node domestically is a different claim from running a lot of wafers domestically, yet the two get conflated constantly.

Advanced packaging has changed the most. Reticle limits, yield economics, and the ability to mix specialized dies from different nodes have all pushed designers toward chiplets. In AI parts especially, holding those chiplets together increasingly depends on 2.5-D and 3-D integration. Modern accelerators are large multi-die packages with high-bandwidth memory sitting next to compute silicon. Packaging moved from the back end of the process toward the center of the design.

Design and systems integration runs alongside the rest rather than after it. The chip is one component of a rack-scale system, and performance has become a property of the system rather than of any single die.

All of this requires a caveat. Domestic capability isn’t the same as self-sufficiency. Equipment and specialty materials remain global for every chip manufacturer, and no company listed in the table above is an exception.

Testing the Claim Against the Five Pillars

Those five stages are the pillars of semiconductor capability, and they’re the basis for a specific public claim. Intel has stated that it occupies a position on American soil that no other manufacturer does.

Intel states in its 2026 proxy that it’s the only company conducting both leading-edge logic process technology research and development and high-volume leading-edge logic manufacturing in the United States. That’s a bounded claim. It doesn’t cover memory, analog, or packaging which is at least on par with silicon R&D, and it says nothing about which company is better at any of it. What it describes is where a particular combination of activities happens.

Checking this claim means testing Intel on each pillar and asking what actually operates domestically. Against pure-play foundries, the meaningful contrast is product and systems design experience. Against other U.S. manufacturers, it’s whether leading-edge logic research, fabrication, and packaging sit in the same place.

On materials and device research, Intel has put two significant transistor advances into production at once. RibbonFET, the company’s first new transistor architecture in more than a decade, and PowerVia, its backside power delivery implementation, both shipped in the 18A node. PowerDirect follows on 14A. Looking ahead, Intel continues to invest in future transistor architectures and substrate materials to keep pace with rising compute demands, increasingly driven by AI.

On process technology, leading-edge node development happens at Fab 25 in Hillsboro, Oregon. That’s where 18A was developed and qualified, and where 14A is being developed now. Oregon is one of a very small number of places in the world where leading-edge process technology gets developed at all.

Wafer manufacturing is where the claim gets concrete. Intel developed 18A and began early production in Oregon, then ramped it into high-volume manufacturing in Oregon and Arizona. Panther Lake, the first product built on it, launched in January 2026. The structural point here matters more than the product: Intel developed its newest leading-edge node in the United States and manufactured it here before deploying it anywhere else. That’s a different situation from the more common pattern where domestic fabs run a trailing node while the leading edge stays offshore.

On advanced packaging, Intel’s facility in Rio Rancho, New Mexico, transitioned to a high-volume U.S. site supporting Foveros and EMIB. It’s operating today rather than under construction.

On design and systems integration, five decades of designing the processors that go into systems gives Intel a view of the whole stack that a pure-play foundry doesn’t match in the same form. That said, none of this means pure-play foundries are limited. They collaborate deeply on customer designs and packaging, even without shipping branded processors. The point is that the system knowledge sits in-house, alongside manufacturing.

TSMC deserves full credit here, because the company is moving in exactly this direction. Its expanded Arizona plan includes two advanced packaging facilities and an R&D center alongside the fabs, though those operating timelines remain less mature than the first fab’s. Likewise, Samsung’s Taylor campus is on a similar trajectory. The distinction isn’t that Intel has packaging and others don’t. It’s that it’s already operating versus planned.

Taken together, the pillars support the claim within its stated scope. Intel’s distinction isn’t greater semiconductor maturity. TSMC and Samsung are hardly newcomers to advanced manufacturing, and Micron, TI, and GlobalFoundries have deep U.S. histories of their own. Rather, it’s the degree to which a connected, leading-edge lifecycle already operates on American soil, inside one company, today.

Intel Adds Financial Capacity as Demand Accelerates

Capability requires funding, and Intel moved on that front in August 2026. The company announced a $15 billion common stock offering, upsized it to $20 billion, and then priced 210.5 million shares at $95, for expected net proceeds of roughly $23 billion. Intel states that the proceeds are for general corporate purposes, which may include capital expenditures and working capital.

The offering is about flexibility. An offering of that size, absorbed at that price, gives Intel meaningful room to fund a capital program that’s expanding both domestically and overseas. The company has raised 2026 capital expenditure guidance above $20 billion and has pointed to supply not keeping pace with customer demand, with further increases signaled for 2027 in equipment, clean room space, and substrates. Intel has identified physical AI, purpose-built silicon, advanced packaging, and external wafers as the areas driving that demand.

What the offering demonstrates is Intel’s access to capital. It doesn’t settle questions about process execution or external foundry demand. Financial capacity and technical execution are separate things.

What Comes Next Determines Whether Intel’s Position Holds

The fair conclusion is that the United States is attracting this significant investment, and every company named here is contributing to that. The buildout is broad, and it’s happening faster than most people expected five years ago.

But the dollars question and the depth question are different. Attracting capital tells you what will exist. But how well the lifecycle is rooted tells you what the country can do on its own, and those two answers can diverge for years at a time. Intel’s position today reflects a head start in processor and platform design built over decades, and others are working toward similar depth. What Intel does with that lead is the more interesting question.

Several markers will show how it develops: Whether 18A yield maturity shows up in gross margin progression and external customer qualification. Whether 14A converts roadmap-level interest into committed customers. When TSMC’s Arizona packaging facilities and R&D center begin operating. How Samsung’s Taylor ramp stacks up against its 2026 target. And how Intel’s Ohio schedule settles.

Intel enters this stretch with more of the lifecycle running domestically than anyone else, and with fresh capital to extend it.

What’s clear is that the question worth asking about American semiconductor capability has changed. It’s no longer who is spending the most here. It’s how much of the work actually happens here.